Infinity Fabric 4 and custom silicon, CDNA 3 MI300 specifications, AMD CPU area efficiency, XDNA and AIE, and 2023 EPS estimatesRead more
TSMC CoWoS-R+, TSMC 4th Generation SoIC, Intel Collective Die To Wafer Hybrid Bonding, AMD V-Cache, Sony’s Leading 1-Micron Pitch Hybrid Bonding, MediaTek Networking SoC, and Co-Packaged OpticsRead more
We break through the marketing fluff of Ampere. We also did a cost comparison of Ampere’s Altra and Altra Max to AMD Milan and Intel Icelake. We also do a similar comparison with projected specs for the 5nm based Siryn. SemiAnalysis also details the architecture, including architecture diagrams, on Ampere One exclusively with the help of Cardyak,Read more
In depth breakdown of Nvidia’s Lovelace including architecture, die size, cost, and performance.Read more
AMD, NXP, Google, KLIC, Cirrus Logic, Entegris, SK Hynix, Lasertec, Rohm, FabrinetRead more
Advanced packaging exists on a continuum of cost and throughput vs performance and density. Even though the demand for advanced packaging is obvious, there is an incredible number of advanced packaging types and brand names from Intel (EMIB, Foveros, Foveros Omni, Foveros Direct), TSMC (InFO-OS, InFO-LSI, InFO-SOW, InFO-SoIS, CoWoS-S, CoWoS-R, CoWoS-L, SoIC), Samsung (FOSiP, X-Cube, I-Cube, HBM, DDR/LPDDR DRAM, CIS), ASE (FoCoS, FOEB), Sony (CIS), Micron (HBM), SKHynix (HBM), and YMTC (XStacking). These packaging types are used by all of our favorite companies from AMD, Nvidia, and many more. In Part 2, we will explain all these types of packaging and their uses.Read more
People all over semiconductor world have been speculating about the TSMC and Intel deal. SemiAnalysis wants to set the record straight on these. We are going to dive into the details for wafer supply agreements including prepayment terms and capacity agreements for AMD, Apple, Broadcom, Intel, MediaTek, Nvidia, and Qualcomm.Read more
In this multi-part series we will do a deep dive into the advanced packaging mega-trend. This will include a breakdown of the various types of advanced packaging, flows, tool types, and vendors. In part 1 we dive into what pad limited designs are, the slowdown of Moore’s Law and end of economic shrinks, heterogeneous compute, and the economic and design implications of chiplets.Read more
Shots are being fired at merchant silicon.
Amazon’s Graviton3 completely commoditizes generalized CPU compute while also bringing advanced packaging, PCIe 5.0, and DDR5 to the server market ~6 months before Intel and AMD.
Server and rack level system architecture choices propel Graviton 3 to new heights in cost per unit of compute.
There’s something special about the packaging behind the paywall.