Bridging the gap between business and the worlds most important industry.
Deep dive on Graphcore’s Bow AI accelerator and wafer-on-wafer hybrid bonding technology including the purpose, advantages, cost, process flow, and whose semiconductor manufacturing tools are utilized
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Western fabs and semiconductor capital equipment spending to go bonkers
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GlobalFoundries, Sumco, GlobalWafers, Power Integrations, FormFactor, Texas Instruments, Ichor, Ford, Kulicke and Soffa Industries, TSMC, Amazon, Skyworks, Qorvo, Qualcomm, Murata, Rambus, and Renesas
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TSMC is the world’s leading foundry, and they are making sure it stays that way. Intel and Samsung initiated quite ambitious plans last year that would take their spending on logic semiconductor fabs to $25B+ a year. Alongside these aggressive spending plans, Intel and Samsung pushed roadmaps that would take them to leadership performance, power, and density. TSMC puts ceiling on their ambitious plans.
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Advanced packaging exists on a continuum of cost and throughput vs performance and density. Even though the demand for advanced packaging is obvious, there is an incredible number of advanced packaging types and brand names from Intel (EMIB, Foveros, Foveros Omni, Foveros Direct), TSMC (InFO-OS, InFO-LSI, InFO-SOW, InFO-SoIS, CoWoS-S, CoWoS-R, CoWoS-L, SoIC), Samsung (FOSiP, X-Cube, I-Cube, HBM, DDR/LPDDR DRAM, CIS), ASE (FoCoS, FOEB), Sony (CIS), Micron (HBM), SKHynix (HBM), and YMTC (XStacking). These packaging types are used by all of our favorite companies from AMD, Nvidia, and many more. In Part 2, we will explain all these types of packaging and their uses.
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In this multi-part series we will do a deep dive into the advanced packaging mega-trend. This will include a breakdown of the various types of advanced packaging, flows, tool types, and vendors. In part 1 we dive into what pad limited designs are, the slowdown of Moore’s Law and end of economic shrinks, heterogeneous compute, and the economic and design implications of chiplets.
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SemiAnalysis has been hearing murmurings about TSMC’s N3 having poor yields, poor metal stack performance, being very expensive, and being too late for Apple’s 2022 iPhone. These can’t be confirmed, but we can confirm that TSMC N3 is now shipping in Q1 2023.
The hiccup on N3 brings many questions about TSMC’s competitive positioning versus Intel 20A and Samsung 2nm. Both these nodes are very aggressive and aimed at getting back into a competitive position against TSMC. Intel and Samsung even claim the nodes will bring leadership.
Tesla is known for having their own silicon strategy for their automobiles and was rumored to be working on a AI training chip for their own datacenter use cases as well. An image of this chip was posted and it is quite bizarre. It looks like it could be the first TSMC InFO_SoW product.
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MediaTek is targeting the flagship mobile world next year by shipping the highest density node, TSMC 4nm before anyone else. They will utilize the best standard Armv9 cores with X2, A710, and A510. It will also bring 5G GPP Release 16 support. MediaTek may snatch the Android CPU crown away from Qualcomm and Samsung!
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Morgan Stanley has downgraded TSMC $TSM in a blubbering 83-page report which caused its valuation to tumble by $25 billion. This report is full of errors and falsehoods. SemiAnalysis dissects some of these glaring mistakes.
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