In this multi-part series we will do a deep dive into the advanced packaging mega-trend. This will include a breakdown of the various types of advanced packaging, flows, tool types, and vendors. In part 1 we dive into what pad limited designs are, the slowdown of Moore’s Law and end of economic shrinks, heterogeneous compute, and the economic and design implications of chiplets.Read more
Despite TSMC’s claims of a 1.35x shrink on SRAM, Apple’s system cache has only shrunk 1.22x. This has far reaching implications for the industry.
Designers cannot use increased LLC sizes as a crutch forever given N5’s 1.35x SRAM shrink and N3’s paltry 1.2x.
Our friends over at ICmasters have delved into the package of the Apple A14 Bionic. The die size has beenRead more